A typical mode of transmitting information is by means of a balance wire pair. The wire pair is excited by a generator which applies a complementary, or out of phase, signal on each of the wires. These signals are referred to as differential mode signals. Telephone systems typically use this type of system.
Signals which are introduced electrostatically or magnetically into the two wire system produce a signal on each of the two wires which are in-phase with each other. These signals are referred to as common mode signals.
The problem in a receiving device is to distinguish between the differential mode signals and the undesirable common mode signals. The ability of a particular system component, such as an amplifier, to ignore the common mode interference is referred to as common mode rejection. Common mode rejection is defined as the ratio of the differential mode gain to the common mode gain.
In addition to providing a high common mode rejection ratio, a balanced input impedance to both the differential and common mode signals (i.e. an equivalent impedance to ground looking into each terminal of the differential input node) is desired. The classic single operational amplifier circuit presents this undesirable imbalance situation. Previous solutions to the problem include open loop non-feedback amplifiers and transformers both of which are expensive and, in the case of transformers, do not operate for low frequency and D.C. signals. Additionally, there ave been circuits having three or more operational amplifiers with voltage dividers. These circuits act to cancel the in-phase common mode interference within the accuracy to which the voltage dividers were matched. The differential, or normal, mode voltages were passed through to the next circuit stage. These circuits were commonly used as line receivers and in lower frequency ranges.
However these circuits have the problem that the input impedances to differential mode signals are not balanced at the two input terminals. Attempts to maintain the desired common mode rejection and balance the impedances at the two signal input terminals involved increasing the complexity of the circuit. In particular, at least three operational amplifiers were required to approach the desired performance objectives.